Compact Modeling of LDMOS Transistors

Authored by: Avinash S. Kashyap

Extreme Environment Electronics

Print publication date:  November  2012
Online publication date:  November  2012

Print ISBN: 9781439874301
eBook ISBN: 9781439874318
Adobe ISBN:

10.1201/b13001-41

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Abstract

The semiconductor revolution which started in the 1960s has led to tremendous developments in the area of device design. While bipolar junction transistors (BJTs) were the foundation of earlier circuits, they gave way to MOSFETs due to their many inherent advantages. But all these devices were used in low-voltage (LV), low-power circuits, mostly for signal conditioning. Traditionally, high-voltage operation has been realized in LV processes using circuit techniques [1]. But these techniques increase both the complexity of the circuit and the power requirements. High-voltage laterally double-diffused MOSFETs (LDMOS) [2] make it possible to integrate LV circuits with high-voltage parts instead of using discrete devices. The drift region is present laterally in this case as opposed to power DMOS structures in which the drift region is vertical. One point to note is that LDMOS devices are restricted to a niche of high-voltage and low-current circuits, such as cellular telephony, analog power management, “smart” power applications, and automotive and audio electronics. They cannot handle high power and therefore cannot be used as a substitute for discrete devices in power electronic circuitry.

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