From Deep Submicron Degradation Effects to Harsh Operating Environments

A Self-Healing Calibration Methodology for Performance and Reliability Enhancement

Authored by: Eric J. Wyers , Paul D. Franzon

Semiconductor Devices in Harsh Conditions

Print publication date:  November  2016
Online publication date:  November  2016

Print ISBN: 9781498743808
eBook ISBN: 9781315368948
Adobe ISBN:


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The design of reliable, high-performance analogue, mixed-signal and radio frequency integrated circuits (RFICs) presents many challenges. Runtime performance and reliability can be degraded by variations in process, voltage, temperature and ageing (PVTA); impedance mismatches; and extreme operating conditions, such as radiation exposure and partial or total device-and block-level failures, all of which can lead to overdesigning the susceptible analogue blocks to cover the worst-case scenarios. An alternative to worst-case overdesign is to include on-chip digital calibration circuitry such that the susceptible blocks are made to be ‘self-healing’ [1]. Here, by self-healing, we mean those analogue, mixed-signal, and RFIC designs which cope with a plethora of performance and reliability degradations (extreme or otherwise) at runtime by the use of on-chip intelligence to ‘heal’ the circuit/system back to an acceptable level of performance and reliable operation. In the literature, one finds an increasing amount of self-healing implementations being used to solve challenging design problems, such as self-healing phase-locked loop (PLL) strategies [2], a self-healing millimetre-wave power amplifier implementation [3], a self-healing RF amplifier methodology [4], a self-healing input-match technique for RF front-end circuitry [5] and self-healing RF downconversion mixers [6]. An important aspect of the self-healing methodology is that it is not limited to a particular circuit fabrication technology. For example, heterogeneous integration applications [7], where dissimilar fabrication technologies (e.g. GaN high-electron-mobility transistor [HEMT], InP heterojunction bipolar transistor [HBT] and complementary metal oxide semiconductor [CMOS]) are cointegrated in a common package to leverage the performance benefits of the respective individual technologies, can also greatly benefit from self-healing techniques. In this particular case, self-healing can be used to correct for degradations due to the mechanical stress impact of the heterogeneous integration environment on device electrical performance [8], or to mitigate performance and reliability degradation due to difficult-to-manage thermal hotspots [9].

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